Everything an engineer needs to design, stack and quote a 14-layer board — interactive stackup, materials, controlled-impedance math, and real cost drivers in one place.
Click any copper or plane layer in the cross-section to see its role, copper weight and recommended use in a 14 layer PCB.
A 14 layer PCB laminates 14 copper layers with cores and prepreg into one rigid board. You move to 14 layers when 12 runs out of routing channels or clean reference planes — giving each high-speed net a return path and each rail its own plane.
Up to 8 dedicated signal layers let you escape high pin-count BGAs and route dense buses without crossing splits.
Pair every signal layer with an adjacent ground plane for tight return paths, controlled impedance and lower crosstalk.
Multiple power and ground planes lower impedance of the PDN and create low-inductance plane capacitance.
The stackup below is symmetric and controlled-impedance friendly: every signal layer references an adjacent plane, power and ground are paired for plane capacitance, and the build stays balanced top-to-bottom to avoid warp.
| Layer | Type | Copper | Material below | Typ. dielectric | Role |
|---|---|---|---|---|---|
| L1 | Signal (top) | 1 oz + plating | Prepreg | 0.075 mm | Components / fine routing |
| L2 | Ground | 1 oz | Core | 0.10 mm | Reference for L1 / L3 |
| L3 | Signal | 0.5 oz | Prepreg | 0.10 mm | High-speed inner |
| L4 | Ground | 1 oz | Core | 0.10 mm | Reference plane |
| L5 | Signal | 0.5 oz | Prepreg | 0.10 mm | Routing |
| L6 | Power | 1 oz | Core | 0.20 mm | Main power plane |
| L7 | Ground | 1 oz | Prepreg | 0.20 mm | PDN pairing w/ L6 |
| L8 | Ground | 1 oz | Core | 0.20 mm | Centre symmetry |
| L9 | Power | 1 oz | Prepreg | 0.10 mm | Secondary rail |
| L10 | Signal | 0.5 oz | Core | 0.10 mm | Routing |
| L11 | Ground | 1 oz | Prepreg | 0.10 mm | Reference plane |
| L12 | Signal | 0.5 oz | Core | 0.10 mm | High-speed inner |
| L13 | Ground | 1 oz | Prepreg | 0.075 mm | Reference for L12 / L14 |
| L14 | Signal (bottom) | 1 oz + plating | — | — | Components / routing |
All-core construction shown (7 cores bonded by 6 prepreg layers). Values are a starting template — confirm exact Dk, glass style and pressed thickness with your fabricator before release.
A 14 layer PCB is built from cores (cured copper-clad laminate) and prepreg (uncured bonding sheets). Material choice sets Tg, Dk/Df, impedance stability and how high in frequency the board can run.
| Material class | Example | Tg | Dk @1GHz | Df | Best for |
|---|---|---|---|---|---|
| Standard FR-4 | IT-180 / S1000-2 | 150–175 °C | 4.2–4.5 | 0.015–0.02 | General, <5 GHz |
| Mid-loss | IT-968 / TU-872 | 170 °C | 3.9–4.1 | 0.008–0.012 | DDR4, PCIe Gen3 |
| Low-loss | Megtron 6 / Tachyon | 185–200 °C | 3.4–3.7 | 0.002–0.004 | 25G+ SerDes, RF |
| PTFE / hybrid | Rogers 4350B | >280 °C | 3.48 | 0.0037 | mmWave, antenna |
Pre-cured laminate with copper on both faces. Holds two adjacent copper layers and gives the stackup its mechanical backbone. Common: 0.1–0.5 mm.
Glass cloth pre-impregnated with B-stage resin. Flows and cures under heat/pressure to bond cores together. Choose glass style (1080, 2116, 7628) to hit pressed thickness.
½ oz inner layers etch finer traces for impedance control; 1–2 oz on planes and outers carry current. Plating adds ~0.02–0.03 mm to outer layers.
Quick first-order tools for impedance and finished thickness. Use them to sanity-check a 14 layer PCB stackup early — final controlled-impedance values should always be confirmed against your fabricator's field solver.
Single-ended Z₀ for a trace referenced to a plane (IPC-2141 approximation).
Target single-ended: 50 Ω · differential ≈ 90–100 Ω
Finished thickness for a 14-layer all-core build (7 cores + 6 prepreg + 14 copper).
≈ 1.60 mm — standard. Within tolerance of common 1.6 mm target.
A 14 layer PCB needs more lamination cycles, tighter registration and longer drill programs than simpler boards. These factors move price more than raw area — design with them in mind to keep quotes sane.
Sequential builds and any buried/blind vias multiply press steps and yield risk.
14 layers stacked demand tight alignment; misregistration scraps panels.
Low-loss laminates for high-speed nets can double material cost vs FR-4.
Thick board + small drills raises drilling and plating difficulty and cost.
Through-hole is cheapest. Blind/buried vias and any-layer HDI add registration and lamination steps — use them only where escape routing demands it.
Fit your array to standard 18×24" panels. Poor nesting wastes expensive low-loss laminate and inflates per-board price.
Impedance testing and coupon control add cost but are essential above ~1 Gbps. Specify only the nets that truly need it.
Boards reach 14 layers when density, speed and power integrity all push at once.
Hard-won practices that keep a 14 layer PCB manufacturable, balanced and signal-clean.
Mirror copper and dielectric about the centre to prevent warp during lamination and reflow.
Place each signal layer adjacent to a ground plane so high-speed return current stays tight.
Put a power plane directly against a ground plane for low-inductance plane capacitance.
Route high-speed nets over solid copper — a gap in the reference plane wrecks return paths.
Lock the laminate and glass style before routing so impedance targets don't shift at fab.
Thicker boards + small vias raise plating risk; keep drill-to-thickness sane.
Include test coupons so the fab can verify controlled-impedance nets per panel.
Share the stackup before release — fabricators tune pressed thickness and Dk to their press.
Send your stackup and Gerbers to PCBSync for a controlled-impedance, fabrication-ready 14-layer build with engineering review.
